Photonic Systems and Networks (PhosNET) Research Group – PhosNET

PhosNET research group was formed in 2008 as part of the Computer Architecture and Communications Laboratory (CACLab) from the Department of Informatics, Aristotle University of Thessaloniki (AUTH). The main research activities of PhosNET extend along a broad area in the field of photonic technologies with the main focus being on οptical RAM architectures, optical interconnects and network‐on‐chip. It is a fully equipped laboratory with a range of high‐speed test and measurement systems for the characterization of passive and active photonic devices at bit rates up to 40Gbps.

Despite being very recently established, already counts 18 members, of which three faculty members, five post-doctoral and ten PhD students. The result of our research activities is evaluated through the 228 publications in prestigious world-wide journals and conferences (98 journals – 120 conferences) as well as from our participation in the scientific literature (three books – seven books chapters).

PhosNET has worldwide links and collaborations with other top research institutes and industrial research organizations and its activities are supported by industrial grants, national and EU funded research programs. PhosNET has already participated in several FP7 research projects (PLATON, RAMPLAS, Mirage, PhoxTrot, COMANDER, PlasmoFAB, L3MATRIX and STREAMs) coordinating the five of them (RAMPLAS, PLATON, COMANDER, PlasmoFAB and STREAMs) whose main focus has been in the field of optical network-on‐chip and optical RAM technologies and architectures. PhosNET also participates in the national project WisePON funded by the Greek Secretary for Research and Technology.

• “Optical RAM Row Access with WDM-Enabled All-Passive Row/Column Decoders”, T. Alexoudi, S. Papaioannou, G.T. Kanellos, A. Miliou and N. Pleros, accepted in IEEE Photonics Technology Letters, 29 Jan 2014 (doi: 10.1109/LPT.2014.2302854).
• “Dual SOA-MZI wavelength converters based on III-V hybrid integration on a μm-scale Si platform”, D. Fitsios, T. Alexoudi, G.T. Kanellos, N. Pleros, T. Tekin, M. Cherchi, S. Ylinen, M. Harjanne, M. Kapulainen and T. Aalto, accepted in IEEE Photonics Technology Letters, (doi: 10.1109/LPT.2013.2297404)..
• “Client-weighted medium-transparent MAC protocol for user-centric fairness in 60 GHz radio-over-fiber WLANs”, G. Kalfas, P. Maniotis, S. Markou, D. Tsiokos, N. Pleros, L. Alonso, C. Verikoukis, IEEE Journal of Optical Communications and Networking, vol.6, no.1, pp.33,44, Jan. 2014 (doi: 10.1364/JOCN.6.000033).
• “XPM- and XGM-based Optical RAM memories: Frequency and Time domain theoretical analysis” – C. Vagionas, D. Fitsios, K. Vyrsokinos, G.T. Kanellos, A. Miliou and N. Pleros, in IEEE J. on Quantum Electron., vol.50, no.8, pp.683-697, Aug. 2014
• “Perfectly vertical and fully etched SOI grating couplers for TM polarization”, G.Dabos , J.Bolten , A.Prinzen , A.L.Giesecke, N.Pleros and D.Tsiokos, accepted in Optics Communications, (9/2015; 350. DOI: 10.1016/j.optcom.2015.03.081)
• “Ultra-compact and low-power plasmonic MZI switch using Cyclomer loading”, S. Papaioannou, G. Giannoulis, K. Vyrsokinos, F. Leroy, F. Zacharatos, L. Markey, J.-C. Weeber, A. Dereux, S. I. Bozhevolnyi, A. Prinzen, D. Apostolopoulos, H. Avramopoulos, and N. Pleros, in IEEE Photon. Technol. Lett., Vol.27, No.9, pp.963-966, May 2015
• “On-Chip Dual-Stream DWDM 16-Channel SOI-Based MUX/DEMUX Stage with 40GHz Channel Bandwidth”, S. Papaioannou, D. Fitsios, G. Dabos, K. Vyrsokinos, G. Giannoulis, A. Prinzen, C. Porschatis, M. Waldow, D. Apostolopoulos, H. Avramopoulos, and N. Pleros, in IEEE Photonics Journal, Vol. 7, No. 1, #7900210, Feb. 2015
• “PhoxTroT – A European initiative toward Low Cost and Low Power Photonic Interconnects for Data Centres”, A. Håkansson, T. Tekin, L. Brusberg, N. Pleros, C. Vyrsokinos, D. Apostolopoulos, R. Pitwon, A. Miller, K. Wang, D. Tulli, S. Dorrestein, R. Smink, J. Tuin, M. van Rijnbach, J. Duis, (Invited) Intern. Conf. on Transparent Optical Networks (ICTON) 2015, Budapest, Hungary, July 2015
• “High-Gain 1.3-µm GaInNAs SOA with Enhanced Temperature Stability for All-Optical Signal Processing at 10 Gb/s”, D. Fitsios, G. Giannoulis, V.-M. Korpijärvi, J. Viheriälä, A. Laakso, N. Iliadis, S. Dris, M. Spyropoulou, H. Avramopoulos, G.T. Kanellos, N. Pleros and M. Guina, in OSA Applied Optics, Vol. 54, No. 1, pp. 46-52, Jan. 2015
• “Bringing light deeper into the box: optical interconnects for on-board and on-chip technologies and optical RAMs for high-speed cache memories”, Pleros, G.T. Kanellos, D. Tsiokos and K. Vyrsokinos, (Invited) HiPEAC (High-Performance Computing) conference 2015, 2nd Workshop on Exploiting Silicon Photonics for energy-efficient high-performance computing, Amsterdam, NL, Jan. 2015

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